This invention relates to the field of electronic displays, and, more particularly, field emission display ("FED") devices.
As technology for producing small, portable electronic devices progresses, so does the need for electronic displays which are small, provide good resolution, and consume small amounts of power in order to provide extended battery operation. Past displays have been constructed based upon cathode ray tube ("CRT") or liquid crystal display ("LCD") technology. However, neither of these technologies is perfectly suited to the demands of current electronic devices.
CRT's have excellent display characteristics, such as, color, brightness, contrast and resolution. However, they are also large, bulky and consume power at rates which are incompatible with extended battery operation of current portable computers.
LCD displays consume relatively little power and are small in size. However, by comparison with CRT technology, they provide poor contrast, and only limited ranges of viewing angles are possible. Further, color versions of LCDs also tend to consume power at a rate which is incompatible with extended battery operation.
As a result of the above described deficiencies of CRT and LCD technology, efforts are underway to develop new types of electronic displays for the latest electronic devices. One technology currently being developed is known as "field emission display technology."The basic construction of a field emission display, or ("FED") is shown in FIG. 1. As seen in the figure, a field emission display comprises a face plate 100 with a transparent conductor 102 formed thereon. Phosphor dots 112 are then formed on the transparent conductor 102. The face plate 100 of the FED is separated from a baseplate 114 by a spacer 104. The spacers serve to prevent the baseplate from being pushed into contact with the faceplate by atmospheric pressure when the space between the baseplate and the faceplate is evacuated. A plurality of emitters 106 are formed on the baseplate. The emitters 106 are constructed by thin film processes common to the semi-conductor industry. Thousands of emitters 106 are formed on the baseplate 114 to provide a spatially uniform source of electrons.
FIG. 2 shows a basic construction of a typical field emission display device. As shown, there is a substrate 200 formed of a transparent material, for example, glass. On the substrate 200, there is formed conductors 202 and spacers 204. When the FED is finally assembled, conductors 202 will form the contact points necessary to connect the FED into an electronic circuit. Spacers 204 provide the required separation between die 206 and substrate 200. Without spacers 204, the die 206 would be forced together with substrate 200 by atmospheric pressure when the device is evacuated. Die 206 has surface 208 which has formed thereon the emitters which will emit electrons to form an image on phosphor layer 210. Also formed on surface 208 of die 206 are a plurality of contact pads 212 which will be connected to conductors 202 to allow operation of the device.
One method for connecting the bond pads on surface 208 to the conductors 202 is a method referred to as "flip chip" bonding. This technique is described with reference to FIGS. 3 and 4. FIG. 3 shows an example of a die 300 suitable for flip chip bonding. In this example, die 300 has contact pads 302a-302n for providing electrical connection to emitters 306. Bonding pads 302a-302n have formed thereon conductive "bumps" 304a-304n. Bumps 304a-304n provide the electrical connection necessary to the corresponding conductors on the spacers as shown in FIG. 4.
FIG. 4 is a diagram of a substrate 400 having formed thereon a phosphor layer 402, a spacer 404 and a plurality of conductors 406a-406n. Formed on the upper surface of spacer 404 are a plurality of conductors 408a-408n for providing electrical connection to bond pads 302a-302n by conductive bumps 304a-304n (see FIG. 3). However, it is still necessary to provide electrical communication between conductors 408a-408n formed on the spacer and conductors 406a-406n formed on the substrate 400. One method for providing this communication is shown in FIG. 5.
FIG. 5 is a top view of a substrate 500 having the conductors 506a-506n on the spacer 504 electrically connected to the conductors 510a-510n on the substrate 500. As shown in FIG. 5, substrate 500 has formed thereon phosphor layer 502, spacer 504 and conductors 510a-510n. Spacer 504 has formed, on an upper surface, conductors 506a-506n. Spacer conductors 506a-506n are electrically connected to substrate conductors 510a-510n by bonding wires 508a-508n. However, the connecting scheme shown in FIG. 5 is undesirable because it requires that additional manufacturing steps be taken to bond each bonding wire 508a-508n between the proper conductors on the substrate 500 and the spacer 504.
There has therefore been a need in the industry for a method and apparatus to connect substrate conductors to spacer conductors without the use of bond wires.